Hillsboro, OR – October 10, 2025 – The Northwest Electronics Design & Manufacturing Expo (NEDME) returns on Wednesday, October 22, 2025, at Wingspan Event & Conference Center, Hillsboro. The event brings together engineers, product designers, manufacturers, educators, and community partners for a full day of industry connection, learning, and networking. Registration is now open at www.nedme.com.
While NEDME has long been the region’s go-to event for electronics design and PCB manufacturing, it has expanded in recent years to feature a wider range of advanced manufacturing companies—from materials and automation to prototyping and supply-chain partners.
“This expo is about celebrating and strengthening the Pacific Northwest’s innovation ecosystem,” said Kelly Atay, NEDME Board Member. “It’s not just for electronics companies. Local manufacturers, educators, students, and community leaders all have a place here. NEDME is where connections are made that lead to real growth.”
Who should attend
Local businesses & manufacturers seeking new suppliers, technologies, and partners
Engineers & designers looking for practical design-for-manufacturing insight
Educators & students exploring STEM and advanced manufacturing career paths
Entrepreneurs & startups connecting with resources for product development
Community & workforce leaders supporting the future of regional industry
Event highlights
Exhibit Hall: Dozens of exhibitors spanning electronics and advanced manufacturing
Tech Sessions & Panels: Real-world, vendor-neutral talks from experts
Career & Education Corner: A bridge between students and employers
Networking: Opportunities to connect across the supply chain and workforce pipeline
Keynote Speakers: Jim Clarke/Intel Corp & Lupita Maurer/Polar Instruments
Last minute booths still available: This email address is being protected from spambots. You need JavaScript enabled to view it.
About NEDME
The Northwest Electronics Design & Manufacturing Expo (NEDME) is the Pacific Northwest’s longest-running showcase for design and manufacturing innovation—connecting businesses, educators, and community partners to strengthen regional supply chains and workforce development. Learn more at www.nedme.com.
TEWKESBURY, UK – Pulsonix™ (www.pulsonix.com), the Electronic Design Automation (EDA) company delivering technology-leading PCB design solutions, is proud to announce the launch of Pulsonix 14.0, its latest PCB design software platform. This update further strengthens simulation and brings significant enhancements in mechanical-electrical 3D integration, smarter comparison tools, and enhanced usability features - all designed to help Pulsonix reaffirm its commitment to providing engineers with high-performance tools to meet the demands of increasingly complex electronics systems.
Pulsonix 14 introduces PulsonixSim, the new simulation option is built on the ngspice engine and tightly integrated into the Pulsonix schematic environment. It allows designers to attach models, place stimuli and run mixed-mode SPICE analysis, including transient, AC, DC, Monte Carlo, noise, transfer functions, and more - all without leaving the design environment and utilising the same library used for design and PCB layout. Simulation results can be plotted to full screen graph windows or local 'in-design' graphs.
3D Flexi Bend & Clipping Plane Enhancements
A new "lift-off" state for Flexi bend regions allows the flexible portion of the board to originate inside existing boundaries rather than exiting the board edge. The bend region transforms adaptively based on bend-radius parameters.
Additionally, a 3D clipping plane feature lets users selectively hide parts of the design along X, Y or Z axes (and reverse clipping direction) to inspect internal layers or buried elements more effectively.
Interactive HTML BOM & Graphical Comparison Tools
Pulsonix 14.0 supports the Interactive HTML BOM option that exports design and BOM data into a searchable, browser-friendly HTML format.
The Symbol / Footprint Compare and Design Revision Analyser tools highlight differences between design versions or symbols, either in dialog view or using overlaid graphics with dimming/lowlighting.
Usability Upgrades & Window Workflow
The user interface sees multiple enhancements: tear-off windows, dock bars, “find in dialog grids,” and faster category switching to streamline navigation and reduce friction when working with large designs or complex dialogs.
Circular Hatching Style
Pulsonix 14 adds a circular hatching style alongside traditional linear hatching. Circular hatching reduces sharp corner effects during etching, which helps minimise impedance variation for tracks adjacent to hatched copper zones
Major Update to Scripting and Automation
Version 14.0 replaces the legacy ActiveX automation system with a completely re-engineered, modern scripting framework developed in-house by Pulsonix. The new scripting environment provides greater flexibility, improved security, faster execution, and direct access to more Pulsonix objects and functions. Users can now automate complex design operations, customise workflows, and build bespoke productivity tools using industry-standard scripting languages.
Vault Integration & Version Control Enhancements
Vault improvements in Version 14 include visual thumbnail previews of items, “synchronise selected items” folder path alignment, definable permissions, Spice Model and Formal files in Vault and type-specific revision naming schemes - helping design teams maintain data integrity and traceability.
“Version 14.0 represents our commitment to evolve Pulsonix in step with real user needs,” said Bob Williams, marketing director. “By deepening simulation, enhancing 3D inspection, and refining workflows, we believe 14.0 gives engineers a more powerful, cohesive tool - helping them to confidently deliver complex, high-performance electronics designs.”
Pulsonix Version 14.0 is available now. Learn more about the new features and enhancements, by visiting www.pulsonix.com/latestversion or by visiting us at the PCB Carolina exhibition, November 12 in the McKimmon Center at NC State University, NC, USA.
LAKE FOREST, CA – Insulectro, the largest distributor of materials used in the manufacturing of printed circuit boards and printed electronics, has promoted longtime employee Chris Hunrath to Chief Operating Officer (CTO).
Insulectro President and CEO Patrick Redfern made the announcement, “For many years, Chris Hunrath has been a visible, trusted technical voice across the business and markets Insulectro serves, engaging daily with customers, suppliers, and OEMs that power the North American electronics market. I am pleased to announce his promotion from Vice President of Technology to CTO.
“Chris is relentless about educating the industry on current and leading-edge technologies, from materials to design best practices through seminars, conference sessions, and customer enablement programs. He has been instrumental in introducing and scaling advanced technologies and partnerships with fabricators and OEMs helping activate new materials ecosystems and distribution relationships that expand what our customers can build.”
Ken Parent, Chief Operating Officer, agrees, “Chris embodies our mission: real depth of technical knowledge, customer obsession, and the courage to push the industry forward. This promotion recognizes his daily impact and the trajectory he’s setting for our company and customers.”
In his new position, Hunrath will lead Insulectro’s technology strategy across Printed Circuit Board (PCB), UHDI and Substrate, and Printed Electronics markets. He will remain based in Insulectro’s San Jose branch facility.
Hunrath commented, “It’s a great honor to take on the responsibilities of CTO for Insulectro. Our industry is evolving rapidly, and new technologies require new materials and a thorough understanding of how to deploy them for maximum benefit. I look forward to continuing my engagement with customers, OEMs, designers, and supplier partners to help them create the best microelectronics possible. It’s a great time to be at Insulectro.”
Freudenstadt, Germany – Sept. 25th, 2025 - SCHMID Group, a leading global provider of equipment and solutions for the electronics industry, announces a major expansion of its product portfolio to meet the surging demand for two types of products: Advanced packaging substrates and high-performance server boards, in the era of Artificial Intelligence (AI). The AI revolution is reshaping the semiconductor landscape. Global industry analysts project a compound annual growth rate (CAGR) of around 10% for the semiconductor and Advanced Packaging sector over the next 5 years. Market leaders such as TSMC and NVIDIA are driving innovation in chipmaking and pushing for new Advanced Packaging strategies.
At the same time, the tradionell PCB industry is projected to grow at an 8% CAGR, with the strongest momentum in AI server boards (CAGR of about 20%). IC-Substrates are expected to expand with a 15% CAGR, propelled by miniaturization trends and the need for new interconnect technologies.
SCHMID expanded its Equipment Portfolio
To address these growth markets, SCHMID has broadened its InfinityLine product family:
The existing InfinityLine H+ remains SCHMID’s top-selling equipment and continues to grow strongly in line with the market.
The existing InfinityLine V+ meets the demands for increasingly complex high-end PCBs. • The new InfinityLine C+ is on the way to becoming SCHMID’s second-largest revenue contributor.
The new InfinityLine L+, a Chemical Mechanical Planarization (CMP) solution for panel-level substrates and
The new InfinityLine P+, SCHMID’s next-generation single panel plating equipment, both to be launched in late 2025, are required to realize next generation substrate and AI-Server-PCB requirements.
With the existing product lines and the newly developed and introduced production equipment, SCHMID is positioned as a leader in enabling next-generation package substrates and AI-server PCBs with a now even broader product portfolio.
Enabling Next-Generation Substrates
Beyond the InfinityLine product family, SCHMID is driving technology leadership with:
SCHMID ET-Board technology, supporting Cu-damascene manufacturing at panel level to deliver miniaturization at scale.
As AI companies increasingly demand Chip-on-Wafer-on-PCB (CoWoP) solutions, SCHMID is uniquely positioned to deliver best-in-class yield and the lowest cost of ownership across the industry.
Strong Outlook
With its expanded product portfolio and strong positioning in high-growth markets, SCHMID expects 2025 to remain a transition year. From 2026 onwards, the company anticipates above-market growth, particularly with its AI-driven product lines. These segments are projected to deliver disproportionate growth in 2026 and 2027, establishing themselves as the primary drivers of SCHMID’s overall revenue expansion.
Executive Statement
“The AI era is fundamentally transforming the electronics and semiconductor industries. SCHMID is proud to provide the critical technologies that enable glass core substrates, panel-level Cu damascene, and manufacturing solutions for next-generation AI-server boards. With our expanded InfinityLine portfolio, we are ready to lead this transformation together with our customers”, said Christian Schmid, CEO of SCHMID Group.
WESTFORD, MA, USA, September 4, 2025 – Zuken Inc. (President: Katsube Jinya, hereinafter “Zuken”) has joined "JOINT3" consortium to develop next-generation semiconductor packaging. JOINT3 is a co-creation evaluation framework established by Resonac Corporation (President and CEO: Hidehito Takahashi, hereinafter “Resonac”) with the aim of accelerating the development of materials, equipment, and design tools optimized for panel-level organic interposers through collaboration among material, equipment, and design companies. JOINT3 brings together global leaders in semiconductor supply chain. Using a prototype line for 515 x 510mm panel-level organic interposers, the consortium promotes the development of materials, equipment, and design tools optimized for panel-level organic interposers.
Based on Zuken’s track record and expertise as an EDA vendor supporting customers in advanced packaging design, we participate in the practical implementation of next-generation semiconductor packaging design, manufacturing, and verification with panel-level organic interposers in JOINT3. And Zuken contributes to the establishment of optimal design and manufacturing process by developing tools and features to solve issues that emerge in the process.
In recent years, packaging for back-end processes has emerged as a key technology in the field of next-generation semiconductors. This includes 2.xD packages, whereby multiple semiconductor chips are arranged in parallel and connected via interposers, demand for which is expected to grow in line with the need for increased data communication capacity and speed. As semiconductor performance improves, interposers are becoming larger, and there is a shift from silicon interposers to organic interposers made from organic materials.
Conventional manufacturing methods involve cutting rectangular pieces from circular wafers. However, as interposers increase in size, the number of them that can be obtained from a single wafer decreases, posing a significant challenge. To address this issue, a manufacturing process that transitions from circular wafer shapes to square panel shapes is gaining attention, as it allows for an increased number of interposers to be produced from a given area of wafer.
Zuken has participated in various 2.5D and 3D package design, manufacturing, and verification projects, in addition to providing customers with advanced package design environments. Throughout the course of these projects, we have a proven track record in supporting the design and tool development for various technologies such as Chip stacking, Organic Package stacking, and various interposers. These experiences and technologies are consolidated into the CR-8000 Design Force's 2.5DIC/3DIC design and verification features, and the SoC/package/PCB collaboration design environment.
In JOINT3, Zuken engages in the practical implementation and validation of next-generation semiconductor packaging design and manufacturing using panel-level organic interposers. In addition to verifying the physical structure design and electronics design, Zuken is also planning to develop new functions such as preliminary verification in the design stage that takes into account the physical properties and chemical characteristics of various materials.
By collaboration and co-creation with other JOINT3 members, Zuken contributes to the evolution of design, manufacturing, and verification process for the next-generation semiconductor packaging with panel-level organic interposers. And Zuken aims to play a key role in the next-generation ecosystem and supply chain.
Overview of JOINT3
Name
JOINT3 (JOINT:Jisso Open Innovation Network of Tops)
Objectives
Accelerate the development of materials, equipment, and design tools optimized for panel-level organic interposers through co-creation with participating companies.
Participating Companies (listed in alphabetical order)
Hitachi High-Tech Corporation, JX Advanced Metals Corporation, Kao Corporation,
Lam Research Corporation, LINTEC Corporation, MEC COMPANY LTD., Mitutoyo Corporation,
NAMICS Corporation, Nikko-Materials Co., Ltd., OKUNO CHEMICAL INDUSTRIES CO., LTD.,
Synopsys, Inc., Tokyo Electron Ltd., Tokyo Ohka Kogyo Co., Ltd., TOWA Corporation, ULVAC, Inc.,
Ushio Inc., ZUKEN Inc., 3M Company
Location
Advanced Panel Level Interposer Center “APLIC”
(Yuki City, Ibaraki Prefecture, Japan (within the Resonac Shimodate Plant (Minami-yuki)))
Packaging Solution Center
(Kawasaki City, Kanagawa Prefecture, Japan)
Activities
Developing materials, equipment, and design tools for organic interposers using a panel-level (515 x 510 mm) prototype production line
Promoting development through co-creation by having material and equipment manufacturers produce common prototypes
Utilizing JOINT3 as a “training ground” for technology and equipment manufacturers to further enhance technologies related to panel-level organic interposers
DOVER, DE – September 2025 – Luminovo, the number one quoting, procurement and collaboration software for the electronics supply chain, will hold its first-ever Spanish-language webinar tailored to the Mexican market. The online session, “How to optimize electronic component purchases and save costs,” will take place on September 5, 2025 at 1 PM EST, and will run for approximately 45 minutes.
The session will be hosted by Roberto J. Cantero of Luminovo and will feature Victor H. Madero, CEO & Founder of SMTVYS, as the guest speaker. Together, they will share strategies to centralize electronics purchasing data and maximize pricing efficiency. Attendees will discover how to achieve up to a 200% increase in purchasing efficiency and cut annual component costs by as much as 10%.
Key topics include:
Electronics Supply Chain Trends – Insights into the latest industry shifts and approaches to tackle a rapidly changing market.
Solutions for 2025 – Proven strategies and innovative methods to manage growing complexity and volatility.
Proactive Risk & Cost Management – Leveraging real-time data—covering compliance, lifecycle tracking, availability, and pricing—to drive savings and resilience.
The session will conclude with an introduction to Supply Chain Intelligence, showing how to transition toward a more data-driven, agile electronics procurement model. The webinar is ideal for EMS providers and OEMs with substantial electronics content—especially procurement, strategic sourcing, costing engineers, and supply chain managers.
This event marks a milestone in Luminovo’s regional engagement, offering localized expertise in Spanish tailored to the needs of the Mexican electronics industry.
