High-power chip resistors with aluminum nitride substrates support thermally constrained electronics applications. The RMAN series uses aluminum nitride to enable higher thermal conductivity than standard alumina, allowing improved heat dissipation, lower operating temperatures and stable electrical performance. Designed for power-dense environments, the resistors support applications including IGBT, SiC and GaN modules, power supplies, EV systems and RF circuits. Devices deliver power ratings up to 2.4W in 1206 and 3.4W in 2512 packages while maintaining controlled hotspot temperatures.
Roll-to-roll coating system supports thin-film development for electronics, energy and advanced materials research. The system uses slot-die coating technology and supports processing of up to 100m of foil, enabling consistent film deposition with controlled web tension. Available in multiple platform lengths and widths, the modular design allows configuration for a range of experimental setups, including use in gloveboxes and controlled environments. Supports applications such as PCB coatings, printed electronics, batteries, fuel cells, OLEDs, sensors and medical films. Control options include touchscreen, manual adjustment and PC-based operation, with features such as forward-reverse and stop-and-go processing to accommodate different workflows.
Multilayer ceramic capacitors (MLCCs) expand available case sizes and capacitance values for aerospace and defense electronics. The MIL-PRF-32535 BME NP0 series supports high-CV performance in compact 0402–1210 packages, enabling reduced component count and improved PCB layout efficiency. Rated from 68–47,000pF with voltage ranges of 4–100V, the capacitors meet “M” and “T” MIL-SPEC reliability levels and are approved by the Defense Logistics Agency (DLA) for inclusion in the Qualified Products Database. Suited for filtering, tuning, decoupling, timing and blocking circuits in mission-critical systems. Incorporates Flexiterm terminations. Available in standard packaging formats.
Laminate and prepreg material targets high-speed digital designs by eliminating fiber weave skew through proprietary resin and reinforcement technologies. The material supports differential signaling at 224Gbps PAM4 and beyond, addressing timing mismatch caused by glass weave structures in traditional laminates. It delivers dielectric constant (Dk) of 2.80 and dissipation factor (Df) of 0.0007, stable across frequency up to 110GHz. Measured insertion loss is approximately 1.05dB/inch at 56GHz on 7-mil differential pairs with HVLP4 copper, with lower loss projected using HVLP5. The material supports standard FR-4 processing, including CO2 and UV laser drilling, with no fiber pull-out or residue. It provides peel strength greater than 5pli on HVLP4 copper and supports stacked microvia reliability through 500-cycle testing. Designed for applications including PCIe 7 and next-generation high-speed interconnects, the laminate enables consistent signal integrity without requiring panel rotation or routing compensation techniques.
Version 10 PCB design software introduces updates for schematic capture, PCB layout and design workflow management. Supports design variants, lasso selection and customizable toolbars, along with import capabilities for Allegro, PADS and gEDA formats. PCB design enhancements include time-domain track tuning, graphical design rule editing and expanded design block functionality. Adds support for inner-layer objects in footprints, pin and gate swap, and improved DRC workflows. Library updates include STEP-based 3D models and expanded symbol, footprint and model libraries. Designed to support complex PCB design workflows and improve usability, performance and interoperability across electronics design environments.
Fuse EDA AI Agent is an autonomous workflow orchestration system designed to manage semiconductor, 3D IC and PCB design processes across the full electronic design automation lifecycle. The system coordinates multi-tool and multi-agent workflows spanning design, verification and manufacturing sign-off, supporting automation of tasks such as RTL development, testbench generation, place-and-route, timing analysis and design rule checking.