Printed Circuit Design & Fab Online Magazine - Current Issue

Designer’s Notebook

Fine tuning the timing of net groups.

When faced with a microcontroller and a companion memory chip, to unravel the crossed-over connections while maintaining high quality microstrip and stripline connections can be a daunting task. Add in the requirement around the time of flight for a typical memory bus or other family of high-speed connections, and you can spend considerable time sorting out that nest of interconnections.

As PCB designers, we go to great lengths to meet the requirements for additional air gaps around transmission lines. Isolating one trace from another becomes more important as the overall length of the traces grows. Crosstalk is a function of how far two traces run parallel to each other at a given distance apart. So, ultimately it is more than the minimum air-gap in play. The length of the boundary also matters.

With a number of connections that start in one general area and end at some other location, it’s easy to picture a river of traces running from here to there. The variance in length between any of the routes is small compared to their total length. Any traces on the long side get pulled tight to minimize their natural length. From that point, the traces that end up too short get some meanders along the way.

Read more: PCB Bus Routing

"Non-standard" head shapes mean flex circuits are a given.

We've come a long way in the AR/VR space. It seems like we're going to have this stuff whether we want it at the moment or not. It's kind of like the Northwest Passage through the ice cap. It's new. We're not sure what the result looks like, but we're charging ahead with a virtual and/or augmented future.

Set the wayback machine to 1939, when both my father and the View-Master stereoscope entered the room. This wasn't long after Kodachrome was invented, so it was cutting-edge at the time. We put circular cards into the slot and could browse seven different views that somehow tricked the eye into seeing depth from isolating each eye on two similar slides (Figure 1).

Back in "real" reality, this technology still has a lot of room to grow. It was about a decade ago when virtual reality started to bubble up into the lexicon at Google. We knew that a new industry was coming into existence and wanted to at least provide a gateway to the content. A group adjacent to the Chrome team developed a product called "Cardboard" that reminded me of the View-Master.

Read more: PCB Design for Virtual and Augmented Reality Headsets

A good library is built with an understanding of the manufacturing limits.

One of the primary factors in the quality of a printed circuit board design system is the makeup of the component footprints. The board can only be as good as the foundational pieces. Making it up as you go along is not a process for the long term. Errors or inconsistencies in the library account for a fair share of the feedback we receive from the fabricator. That is the wrong time to consider the fundamental building blocks of our collective occupation.

The source of the component footprints should be considered. A good cross-section of the supply chain provides the customer with schematic and layout symbols. This is, of course, to make it easier for us to implement their chips and other parts. CAD tools often come preloaded with a number of device examples to get you started.

Take those "freebies" with a grain of salt. One of the ways this kind of help can get in the way is in terms of traceability. One of the more important aspects of a good library is to have one and only one instance of a particular part. Naming conventions come into play here. Many, but not all, of the baseline libraries use naming conventions outlined by IPC-7351.

Read more: Wrong Steps: How Your PCB Footprints Could Be Holding You Back

Design constraints often morph with lessons learned from the prototype.

Can we just assume that every board design is going to be a nonlinear effort? While we know that everything is subject to change except the tape-out date, there are a few ways we can taxi toward the runway of product launch.

Today's supply chain is tighter than the one in the textbooks on product management. The printed circuit boards are often in the critical path, whether they are test jigs for prototypes or the final mass-production units. A schedule slip on P1 cascades to P2 and everything gets compressed. Execution is essential. Otherwise, we won't have time to learn the lessons of the first iteration before committing to the next.

This creates a dynamic where there are likely to be updates to the schematic at different points in the layout cycle. When we're designing something that is new from the ground up, we make educated guesses and assumptions about almost everything. Chips don't lie and can't fix themselves after a layout that doesn't "let them eat."

Keep 'everyone' in the loop for drastic revisions. Fundamental lessons learned on the initial design are inevitable. Thus, the designer must be able to create a second revision where it doesn't appear to have bug-fixes slapped on top of the first try. An example of this is when an analog circuit needs to have a series element added.

Read more: Surviving the Rush to Tape Out the Printed Circuit Board