ROCHESTER, NY – EMA Design Automation announced three upcoming webinars:

A Dive into DDR5: An Engineers Guide to Simulating and Validating the Latest Generation of DDR
Sept. 22

This event will focus on the improvements of the DDR interface. It will look at the required changes to simulation techniques and methodologies to ensure an accurate and effective DDR5. The webinar will cover an overview of the latest DDR5 changes vs. DDR4; enhancements and new features in DDR5; how these changes such as decision feedback equalization impact simulation and analysis; and how to effectively simulate and qualify DDR5 interfaces with Sigrity.

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Common Challenges when Designing IoT PCBs – And How to Solve Them with Cadence
Sept. 29

Cadence and EMA experts will focus on how the intelligent system design platform at the heart of the Cadence PCB flow enables teams to concurrently manage and overcome IoT design challenges early in the design process, optimize the design, and verify functionality for first-pass success. The webinar will cover how to prevent component availability, compliance, cost, and reliability issues upfront (CIS/CIP, PSpice); how to manage designs inside tight form factors (3D Canvas, Flex); how to route high-speed signals within tight spaces (auto interactive, contour etch, scribble); how to define and ensure DFM and high-speed design requirements will be met (constraint management); how to incorporate and shield RF elements into connected design (RF coil, backdrill, shielding); how to do all this within a single design platform across design, analysis, mechanical integration, and DFM (IDA, Aurora).

To register, visit

Predicting RF PCB System Performance Using COTS Parts
Sept. 30

This event will discuss how almost every electronic product has some level of wireless communication/connectivity associated with it. Ensuring these links work as intended can be a significant challenge. Joel Kirschmann will show how Cadence AWR visual system simulator RF link analysis can help with RF link goals on the first pass. The webinar will introduce the Cadence AWR visual system simulator for RF link analysis; how to build an RF link model using commercial off-the-shelf parts to analyze and predict system performance prior to manufacturing; how to incorporate PCB trace parasitic effects to confirm RF performance based on design implementation; how to validate RF link performance with error vector magnitude measurements and integrate with test and measurement equipment; and how this can be done in a reusable RF link analysis environment with AWR visual system simulator.

To register, visit

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