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COVER STORY
Benefits and Challenges of 3D Semiconductor Packaging
By integrating multiple die elements within a single package outline, overall product functionality has increased and been made smaller than their predecessors, improving both performance and capability. Assembly of semiconductor die onto a substrate is essentially the same as those used for standard IC packaging in lead frames; however, substrate-based IC packaging for 3D applications can adopt a wider range of materials, and several alternative processes may be used in their assembly.
by Vern Solberg

FIRST PERSON

• Caveat Lector
  Standard problems.
  Mike Buetow
  
  
  

MONEY MATTERS

• ROI
  Ensuring onshoring.
  Peter Bigelow

• Focus on Business
  Talk, talk, talk.
  Susan Mucha

TECH TALK

• Signal Integrity Insights
  End games.
  Dr. Eric Bogatin

• Database
  Building the right library.
  Manny Marcano

• Designer’s Notebook
  Those crazy centroid files.
  Duane Benson

• Technical Abstracts
  In case you missed it.

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