SAN JOSE – Cadence Design Systems has completed the acquisition of Denali Software, provider of electronic design automation software and intellectual property.

Denali's products include memory models, design IP and verification IP.

Cadence can now accelerate its EDA360 execution and expand its portfolio, the firm says.

Denali’s team, including founders Sanjay Srivastava and Mark Gogolewski, will report to Nimish Modi, senior vice president, research and development, Front End Group, Cadence.

No financial terms were disclosed.

CATANIA, ITALY – Partners in a new publicly-funded research project today announced details of a new 13 million euros program aimed at improving energy-efficiency of new products and technologies.

END – Models, Solutions, Methods and Tools for Energy-Aware Design is a three-year ENIAC (European Nanoelectronics Initiative Advisory Council) project designed to enhance the competitiveness of Europe's semiconductor and electronics equipment companies.

The project will pursue energy efficiency through a holistic approach that unifies, under a common design platform, modeling, simulation, design and EDA techniques for a range of devices and systems (digital blocks, analog/RF blocks, discrete components).

The project will also address the conception and experimentation of new power supplies, with particular emphasis on energy management aspects.

END brings together user companies (IDMs, fabless), design centers, universities and institutes in a range of projects that will establish standards and contribute to building a solid energy-aware electronics design base for Europe. 

In particular, project goals include the development of power models for non-bulk CMOS devices, a unified low-power design methodology for heterogeneous systems and SoC (System-on-Chip) devices, energy-efficient building blocks for heterogeneous systems, energy-efficient IP components for SoCs, energy management of systems based on multiple, heterogeneous supplies, and demonstrators of solar energy and wireless sensor systems.

The project will cost approximately 12.6 million euros, with funding provided by both the ENIAC JU (Joint Undertaking) and public authorities of Belgium, Greece, Italy and Slovakia.

Project partners include STMicroelectronics s.r.l., Italy (project coordinator); Centro Ricerche FIAT, Italy; ETH Lab, Eurotech Group, Italy; Numonyx Italy; Consorzio Nazionale Interuniversitario per la Nanoelettronica, Italy; Politecnico di Torino, Italy; Alma Mater Studiorum - Universita di Bologna, Italy; Universita degli Studi di Catania, Italy; Universita degli Studi di Salerno, Italy; NXP Semiconductors, Germany; Intracom S.A. Telecom Solutions, Greece; inAccess Networks, Greece; University of Patras, Greece; ON Semiconductor, Belgium; ON Semiconductor, Slovakia; Slovak University of Technology in Bratislava, Slovakia; Acondicionamiento Tarrasense, Spain, and Centre Suisse d'Electronique et de Microtechnique, Switzerland.