Printed Circuit Design & Fab Online Magazine - Design News

Design News

Details: Written by Staff; Category: Design News; Published: 25 May 2010

SYDNEY – Altium has added Aldec's FPGA simulation capabilities to its Designer software.

Details: Written by Staff; Category: Design News; Published: 24 May 2010

SAN JOSE – Cadence has joined IBM to create high-performance integration-optimized IP to help deliver leading-edge designs, while reducing the risk and time associated with integrating complex SoC designs.
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Details: Written by Staff; Category: Design News; Published: 21 May 2010

DARMSTADT, GERMANY -- To address customer demand for integrated layout and 3D full wave analysis, Computer Simulation Technology has undertaken a major collaborative project to enable layout engineers to stay within the Cadence environment while performing a full wave 3D extraction and EM analysis in the background.

Details: Written by Staff; Category: Design News; Published: 20 May 2010

ALAMEDA, CA — A pair of longtime consulting firms are teaming to help companies address current and emerging global environmental requirements while minimizing implementation costs.

SAN JOSE -- Cadence today extended its position in the fast-growing system-on-chip market, snatching up Denali Software for $315 million in cash.

SAN JOSE -- Cadence Design Systems said first-quarter revenue grew 7.8% to $222 million. The EDA company's net loss shrank as business improved in all geographies.