Ed.: This is a special feature courtesy of Binghamton University.
IBM announces 2nm GAA-FET technology. IBM announced its 2-nanometer CMOS technology, developed at its Albany research center. The development has technical firsts: the use of bulk Si wafers with bottom dielectric isolation under the nanosheet stack; reducing leakage and enabling 12-nnm gate lengths; a second-generation inner spacer dry process for precise gate control; FEOL EUV patterning to allow nanosheet widths from 15 to 70nm; and a novel multi-Vt scheme. This technology is expected to give a 45% performance boost or 75% power reduction, compared with the 7nm. (IEEC file #12324, Semiconductor Digest, 6/11/21)
Light-based method creates 2-D polymer. Linköping University researchers developed a method that uses light to manufacture 2-D polymers that have the thickness of a single molecule and could create a path for the development of ultra-thin, functional 2-D materials with highly defined crystalline structures. Using an on-surface photo-polymerization process, they tested a way to manufacture a 0.5nm-thick, 2-D polymer consisting of several hundred thousand molecules identically linked. The two-step method takes advantage of the self-organizing properties of fluorinated anthracene triptycene molecules. Because the polymerization takes place in a vacuum, the material is protected from contamination. The 2-D polymer film is stable under atmospheric conditions. (IEEC file #12370, Photonics Spectra, 7/14/21)
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A decade in, IPC-2581 Consortium members say the pursuit toward widespread adoption of the vendor-neutral standard was well worth the rigorous effort.
Few engineers working in electronics manufacturing today predate the first efforts to develop and implement an industry-wide standard for intelligent electronics data transfer.
As early CAD tools were introduced in the late 1960s and early 1970s, IPC launched a vendor-neutral effort to describe electronics design data from schematic through test.
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Realizing advanced electronics with the world’s smallest packages.
Is it worthwhile to design printed circuit boards with the smallest component package available today: the 008004? And how do you do it correctly?
Several months ago, a hardware engineer in a high-tech company that is developing virtual reality headsets approached me. “These are special glasses that can integrate into game consoles in hundreds of millions of homes worldwide,” he said with excitement. “This is innovative technology that will enable a totally different viewing and gaming experience than what’s available at present.”
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Written by Pritha Choudhury, Ph.D., Morgana Ribas, Ph.D., John Fudala and Mitch Holtzer
Category: Features
SAC 305 shows faster shear strength degradation than Innolot, while the surface finish has no effect.
When a solder joint is exposed to cyclic stresses, thermally activated diffusion in the bulk solder, metallization and initial intermetallic (IMC) may take place. The growth of the interfacial IMC helps relieve the residual stress induced in the solder joint, and the growth rate corresponds to the magnitude of stress induced.1 Solder joint strength also decreases during exposure to temperature variations. Therefore, shear testing is a useful method to assess solder joint strength degradation caused by thermal cycling.2
In part one3 of this series we showed the voiding, solder spread and thickness of the high-reliability Innolot alloy compared with SAC 305 alloy solder pastes using five different surface finishes. Part two discusses thermal cycling effects on the growth in IMC thickness and solder joint strength. This study included two commonly used solder alloys in paste form:
SAC 305 (96.5%Sn, 3%Ag, 0.5%Cu) powder size distribution (PSD) type 4 with novel “CVP-390” paste flux
Innolot (91.95%Sn, 3.8%Ag, 0.7%Cu, 3.0%Bi, 1.4%Sb, 0.15%Ni) PSD type 4 with the novel paste flux and five variations of surface finishes, including
Organic solderability preservative (OSP) (MacDermid Enthone Entek Plus HT) using two thickness levels
Written by Pritha Choudhury, Ph.D., Morgana Ribas, Ph.D., John Fudala and Mitch Holtzer
Category: Features
For spread and wetting performance, certain finishes stand out.
Electronic assemblers have myriad material and process choices to make, not limited to board materials, solder masks, laminate Tg’s, components, surface finishes, assembly materials and design for manufacturing (DfM) process conditions. High-reliability alloys such as Innolot are designed to meet harsh automotive conditions and extend service life of the solder joint. Applications requiring higher operating temperatures and increased number of cycles to failure have benefited by implementing that alloy. While solder alloy selection is an important factor in determining reliability of the solder joint, considerations should be made for surface finish selection to further enhance performance. This study explores surface finish factors such as IMC formation, voiding and solder spread that contribute to reliability.
Each choice can have a significant impact on the in-service reliability and commercial success of the assembly. This multi-part article will focus on data developed from an extensive study of surface finishes and solder pastes used by many global, high-reliability assembly manufacturers. The study included two commonly used solder alloys in paste form:
SAC 305 (96.5%Sn, 3%Ag, 0.5%Cu) powder size distribution (PSD) type 4 with novel “CVP-390” paste flux
Innolot (91.95%Sn, 3.8%Ag, 0.7%Cu, 3.0%Bi, 1.4%Sb, 0.15%Ni) PSD type 4 with the novel paste flux and five variations of surface finishes, including
a. Organic solderability preservative (OSP) (MacDermid Enthone Entek Plus HT) using two thickness levels b. Immersion tin (Ormecon CSN) c. Immersion silver (MacDermid Enthone Sterling) d. Electroless nickel/immersion gold (ENIG) (MacDermid Enthone Affinity).
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PCD&F’s annual salary survey reflects the consistency and stability of the PCB design industry.
To say much has transpired in the past year and a half is the understatement of all understatements. When we published the findings of our last designers’ salary survey in May 2020, we were still in the early months of the Covid-19 pandemic, many of us in the initial stages of a lengthy quarantine we thought was temporary. We were unsure how the virus would affect the world in the short-term, let alone the long-term – with regard to the health of loved ones and the economy as a whole, to name two of countless concerns. It will be many years before we fully comprehend the enduring global impact of this unmitigated health crisis, but if this year’s survey is any indication, one thing that has remained consistent is the PCB design engineering profession.
The US unemployment rate in July 2020 was 10.2%, and as of July 2021, it was 5.4%, according to the US Department of Labor.1 More specifically, for engineering occupations, the unemployment rate as of Jun. 30, 2020, was 6.1%, and at Jun. 30 this year, it was only 3.4%, BLS says, and the computer systems design and related services sector added 100,000 jobs in June alone.1
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