Why you should take the time to use the dimensioning tool.
One of the many hats worn by a board designer is that of draftsperson. Before settling into a position doing layout, I had a contract to create drawings on vellum – with a pencil! Before they turned me loose, the manager asked me to write my name and phone number on a piece of paper. That was all it took; get to work. Ever since seventh grade drafting class, my normal handwriting has been in all caps. We no longer need legible handwriting to land a job, but some of the things I learned at Cavro Scientific have stuck with me all these years.
Dimensions and tolerances. The electronic data alone are enough to fabricate a board most of the time. Whether it’s an omnibus file like IPC-2581 or a collection of Gerber and drill data, the hole size and locations are provided with the circuit pattern. Why take the time to use the dimensioning tool? Here’s why. Someone must inspect the PCB before it leaves the fabricator. Someone else inspects it on the way into the assembly factory. All the fab and assembly drawings are inspection documents.
The design intent can be lost without the effort made to establish a bolt pattern or other feature critical to the design. So-called “mid-mount” connectors are nested into a slot. That slot may have a very tight tolerance. The datasheet for the connector may even have a unilateral tolerance that permits the slot to grow but not shrink from the nominal value. Without the dimension and the tolerance, the “assumed tolerance” will take the nominal width of the slot and give plus or minus the usual allowance for deviation from the title block of the drawing. That may be fine for the rest of the board outline but could lead to issues if not properly controlled.
I draw some of these critical dimensions on the board dimension layer and the rest on the package dimension layer. Dimension the footprints to simplify checking and avoid mistakes. I’ve caught my own errors that way. Taking the time to dimension the features in much the same way as the drawing is a nice little insurance policy.
Details and the big picture. We use details whenever the feature is too small or oddly located for normal dimensions to cover the geometry. The bevel on an edge connector is one such feature. The “mouse bite” around the assembly sub-panel is another one. Since you’re not reinventing the wheel every time, keep a scrapbook full of common design elements for reuse when appropriate.
We use details for many other things. Impedance is called out on a layer-by-layer basis and at the same time supports numerous impedance values for each signal layer. Reference planes for each are also noted. It’s natural to set up a chart that allows interested parties to cross-reference the design against the design rules. We use another chart for the various drill sizes, tolerances, quantities and plating specifications. High-density interconnects (HDI) make use of several boxes of data broken out for each layer pair. The different stack-up regions of a flex or a rigid-flex could be depicted in this form or potentially broken out as separate details for modular reuse. Next, I’ll discuss a less obvious way tables can come in handy.
Tabular drawings: a chance to save paper and time. Some types of drawings can cover more than one board. One instance is a flex circuit that mounts to a bespoke connector. Let’s say there’s a ZIF (zero-insertion force) connector on one end and a stacking connector at the other, with a pattern of lines and shapes running from end to end. It is possible the same connector pair can be used for different interconnects in a system of boards. You could have various lengths called out with a separate dash number for each length. Down the road, more examples could be added with little effort.
In this way, the same fabrication and assembly drawings can support numerous sets of artwork. You have two detailed images of the ends of the flex with a jagged pair of lines separating the two. A dimension from end to end refers to a table that indicates the overall length.
Notes: Unless otherwise specified. This is a topic in its own right. The written instructions we give fabricators and assemblers can be insufficient and overkill at the same time. Process data do not belong on an inspection document. That is what we generate at the end of each cycle. Sampling plans, solder profiles, and other how-to items should go into separate documents to be referenced by the fabrication and/or assembly notes.
The inspector should be able to look at the product and the documentation and conclude whether they meet the requirements. Provided I’m not colorblind, I can see the color visually. I can measure the thickness of the solder mask with a cross-section. I cannot tell if it was cleaned with “ultra-pure” water prior to application of the mask. What I can do is determine if it passes the solder mask tape test according to IPC-TM-650 Test Method 184.108.40.206. That’s what matters. That’s what can be evaluated, and that’s what you should be using for your notes.
If the product is to adhere to IPC-6012 Class 2 standards, write that in the notes. That performance specification covers a lot of ground, and there is no need to repeat what is conveyed by that one note. What you need to call out are exceptions to the rules set forth by the IPC classes. For instance, the via breakout of 90° may not be desirable. A follow-on note stating tangency is the minimum requirement makes sense.
It is now up to the designer (you and me) to create padstack geometry and hole size/tolerance that support the kind of fabrication we require. If, for instance, the product requires a tight flatness spec, and you turn in artwork with unbalanced copper loads, the fabricator is unlikely to yield sufficient numbers to make it a viable product. Perhaps they can bake it in a press to get it flat. Guess what happens when the board subsequently goes through another heat cycle for assembly. It turns right back into a potato chip!
The point is don’t let your notes write checks your layout can’t cash. Use CAD tools to ensure the amount of copper on each layer is essentially a mirror image from the center core outward. Whether it comes to copper thieving on the signal layers or flooding every layer with ground, give vendors a chance to succeed, so your product can succeed. QED. That’s what I came here to say.
is a career PCB designer experienced in military, telecom, consumer hardware and, lately, the automotive industry. Originally, he was an RF specialist but is compelled to flip the bit now and then to fill the need for high-speed digital design. He enjoys playing bass and racing bikes when he's not writing about or performing PCB layout. His column is produced by Cadence Design Systems and runs monthly.