The latest rev the flexible circuits spec has new requirements for HDI, backdrilling, and surface finishes.

In anticipation of revision F of IPC-6013 being released, this is a great time to highlight some of the biggest changes that impact manufacturers and end-users.

With every revision comes quite a few editorial changes. Sometimes requirements are not fully clear or hard to translate into other languages. Often, these come to light when there is a difference of opinion on how to interpret a certain requirement. Committee members do their best to channel their inner English teachers to improve grammar and clarity.

While these often do not change a requirement, they are intended to eliminate disagreements. GEA (IPC) committees are always on the lookout for these situations and welcome interpretation questions to build into the next revision.

Another place to make things clearer is when a figure is updated. Again, figures can be misinterpreted or not as clear as one would like. Often, someone can bring a better visual example to the table that is more “true to life.” Some new figures reflect technology changes, such as microvias and backdrilling.

Beyond these types of updates are technical changes that add or modify requirements. These changes are driven by evolving technologies that introduce new circuit attributes, updated requirements that address manufacturing challenges tied to emerging features and the addition of new methods for validating finished product quality. Here are some of the changes to be aware of.

Table 1-1 is the Default Table. When a drawing is silent on a particular attribute, the default table provides a requirement. Historically, this table has listed solder as the default final finish. It will now note ENIG as the default for all new designs upon release of the document. This change reflects the drive toward Pb-free assemblies and ever-shrinking HDI features. ENIG is the preferred final finish in many markets and applications, and the new revision reflects that.

The table also adds a thinner minimum dielectric spacing requirement on new designs, permitting 65µm where it used to be 90µm. Again, this reflects some of the HDI designs with thin dielectric build-ups.

Many heavy users have come to know where certain sections land in the specification. They can even tell if it is on an odd or even page. With some changes in this revision, some of that memory will need updating.

Terms and definitions have moved out of IPC-6013 and now reside in IPC-T-50.

Another big change: All the copper plating tables have moved! They are now in the microsection portion of the document, in 3.6.2.11. The idea is that requirements should be located where inspection takes place. Some wording was changed to be clear that this is copper plating for drilled holes. Note that this move will affect the entire IPC-601X series.

Figure 1. IPC-6013F repositions copper plating tables to the microsection inspection section.

Electrical test requirements have moved to 3.10.18 to consolidate all electrical tests in one location. Some of the new requirements provide direction for attributes not previously covered.

Some additions may have been long overdue. Section 3.3.1 adds requirements related to board edge plating, while section 3.3.1.3 clarifies that board thickness should not be measured within the transition zone due to potential highs and lows caused by prepreg, coverlay and bondply overlaps. Section 3.3.9 introduces allowances for strain relief variations, including skips, voids and extension onto the rigid cap, replacing Rev. E’s AABUS language that had generated frequent questions and concerns. The revision also adds a section on backdrilling in 3.3.10, largely incorporating IPC-6012 requirements, along with section 3.6.2.19 covering backdrill microsection evaluation. Section 3.3.11 introduces a section on cavities, again drawing from IPC-6012 guidance.

Additional revisions include updates to the minimum annular ring requirements in Table 3-8 (formerly Table 3-11), which now separate external annular ring requirements for filled and capped vias from those for non-filled and capped structures, given the difficulty of assessing capped vias without microsection analysis. Section 3.5.4.5 on dewetting adds figures illustrating irregular HASL thickness as part of expanded tutorial-style guidance. Sections 3.5.4.8 and 3.5.4.9 add allowances for depressions and protrusions in non-soldered via locations for cap-plated filled holes and copper-filled microvias to avoid rejecting functionally acceptable parts for cosmetic reasons.

Table 3-12, covering PTH integrity, replaces the term “overall dielectric removal” with “copper penetration” and revises the maximum limits to better control extension beyond internal pad edges while maintaining adequate lateral spacing as annular rings continue to shrink. The same table also adds a note discouraging etchback for designs of all classes that permit tangency due to the risk of minimum spacing violations. Section 3.6.2.6.1 introduces new “evidence of etchback” language as an alternative to measurable etchback values, while section 3.6.2.6.3 rewords copper penetration requirements and updates associated figures to better balance larger pad designs with tighter geometries. References to “wicking” have been removed entirely.

Elsewhere, section 3.6.2.9 expands annular ring evaluation guidance for blind and buried vias and clarifies how sequentially laminated via structures should be assessed. Section 3.6.2.11, now renamed “Hole Copper Plating” from “Plating/Coating Thickness,” clarifies that the requirement applies to plated through-hole copper rather than surface finish thickness. The revision also allows manufacturers to forgo multiple measurements and averaging if the thinnest observed measurement already exceeds the requirement and adds Figure 3-34 to demonstrate proper measurement locations. Finally, section 3.6.2.17 lowers minimum dielectric requirements for new designs, reflecting HDI constructions that increasingly rely on thinner cores and prepreg materials for microvia structures.

Other small changes were made, but these are probably the most impactful.

It is also worth noting that the Global Electronics Association (GEA) has created a new method for tracking changes in these documents, which is expected to roll out across all documents moving forward. The goal was to automate and standardize how GEA communicates document changes from one revision to the next. GEA tested out a couple of methods to capture document changes and got feedback from a group of committee chairs.

The update is intended to make revisions easier to identify, particularly for training and implementation purposes, while improving consistency across documentation updates.

Finally, none of the various specifications is set in stone. If you see something amiss, say something. Make recommendations for changes; the specs only get better with input.

Nick Koop is director of flex technology at TTM Technologies (ttm.com), vice chairman of the IPC Flexible Circuits Committee and co-chair of the IPC-6013 Qualification and Performance Specification for Flexible Printed Boards Subcommittee; This email address is being protected from spambots. You need JavaScript enabled to view it.. He and co-“Flexpert” Mark Finstad (This email address is being protected from spambots. You need JavaScript enabled to view it.) welcome your suggestions.